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Register renaming is a technique modern processors used to remove a false data dependency created by register reuse.

In modern processors, instructions are run out of order so that they can be executed in parallel - and thus, the rate of instruction consumption is faster.

For example,

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1 mov eax,[x]
2 add eax,20
3 mov [x],eax
4 
5 mov ebx,[y]
6 add ebx,30
7 mov [y],ebx

Assuming x != y, lines 1-3 have no effect on lines 5-7 (there is no data dependency), so lines 1-3 can be run at the same time as lines 5-7, a bit like this:

   Time  Operations
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1     mov eax,[x]  mov ebx,[y]
2     add eax,20   add ebx,30
3     mov [x],eax  mov [y],ebx

However, due to the limitations on the number of available registers on certain modern processors (cough x64 cough) a register might be reused causing a false data dependency.

Here is an example:

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1 mov eax,[x]
2 add eax,20
3 mov [x],eax
4 
5 mov eax,[y]
6 add eax,30
7 mov [y],eax
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9 ; How can we run these blocks in parallel?! They both use eax!!

To solve this, the processor may be able to rename a register. In lines 5-7 "eax" can be replaced with another register. Thus allowing the blocks to run in parallel like in the original example.

Usually modern processors actually have a lot of available registers, but only a few can be accessed from the instruction set. Therefore there is generally a mapping of "the given register in each instruction" to "the actual register it uses".